• DocumentCode
    1303383
  • Title

    IP protection of DSP algorithms for system on chip implementation

  • Author

    Chapman, Roy ; Durrani, Tariq S.

  • Author_Institution
    Dept. of Electron. & Electr. Eng., Strathclyde Univ., Glasgow, UK
  • Volume
    48
  • Issue
    3
  • fYear
    2000
  • fDate
    3/1/2000 12:00:00 AM
  • Firstpage
    854
  • Lastpage
    861
  • Abstract
    Silicon technology has now advanced to the point that there is a serious mismatch in the time taken to design advanced silicon-based systems and the time to market for any new product or product derivative. To obviate this delay, a new paradigm is emerging based on intellectual property (IP) exchange, where designers and differing companies share subsystems (virtual cores) between themselves to reduce design time to acceptable levels. To this end, over 150 companies including all the major players formed the Virtual Socket Interface Alliance in March 1997. The protection of IP has become a serious issue as intercompany subsystem design exchange becomes more commonplace. This paper presents new techniques to protect the IP of virtual cores that implement digital signal processing (DSP) algorithms. The approach involves embedding codewords into the design of fundamental signal processing algorithms such as digital filters and the DFT in such a way that proof of authorship can be retained, and, if required, easily identified. The techniques discussed can be adapted to protect other fundamental DSP algorithms such as convolution and correlation. The protection of IP via watermarking techniques is increasingly being applied at all levels of design. It is particularly advantageous if such techniques are applied at the highest abstraction levels in the design flow, and if such techniques are applied at basic algorithm level, they become very difficult to detect at lower levels of system design
  • Keywords
    FIR filters; digital filters; digital signal processing chips; discrete Fourier transforms; industrial property; security of data; DFT; DSP algorithms; FIR filter; IP protection; Si; Virtual Socket Interface Alliance; abstraction levels; codewords; convolution; correlation; design flow; digital filters; digital signal processing; intellectual property exchange; intercompany subsystem design exchange; silicon technology; silicon-based systems design; system on chip implementation; virtual cores; watermarking; Algorithm design and analysis; Delay effects; Digital signal processing; Digital signal processing chips; Intellectual property; Protection; Signal processing algorithms; Silicon; System-on-a-chip; Time to market;
  • fLanguage
    English
  • Journal_Title
    Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1053-587X
  • Type

    jour

  • DOI
    10.1109/78.824679
  • Filename
    824679