Title :
L1 normalisation in neural networks using parallel automatic level control
Author_Institution :
Roma Univ., Italy
Abstract :
A simple circuit that performs L1 normalisation of positive-valued parallel inputs is proposed. It can be utilised to implement ´on-line´ normalisation of input patterns or weight vectors in neural networks based on competitive learning mechanisms. A modified scheme with high linearity is also presented.
Keywords :
analogue computer circuits; learning systems; neural nets; L 1 normalisation; circuit; competitive learning mechanisms; high linearity; input pattern normalisation; modified scheme; neural networks; on line normalisation; parallel automatic level control; positive-valued parallel inputs; weight vectors;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19900055