• DocumentCode
    1303707
  • Title

    Guest Editors´ Introduction: Raising the Abstraction Level of Hardware Design

  • Author

    Coussy, Philippe ; Takach, Andres

  • Author_Institution
    Université de Bretagne-Sud
  • Volume
    26
  • Issue
    4
  • fYear
    2009
  • Firstpage
    4
  • Lastpage
    6
  • Abstract
    Design complexity is continually rising with the higher levels of integration implied by Moore´s law. Functional complexity increases as more computation is added to SoCs and as more-complex applications are developed. Additional complexity is introduced by the need to control power consumption and to tackle challenges with respect to physical timing closure and process variations. To manage this complexity requires automation, letting designers focus on high-level design decisions that have the most effect in the implementation´s quality. A higher level of hardware design abstraction also enables an effective exploration of software and hardware architectures, making high-level synthesis a cornerstone of electronic system-level design. This special issue features nine articles that the authors believe will generate interest in the use of high-level synthesis and its further development.
  • Keywords
    Automatic control; Computer architecture; Design automation; Energy consumption; Hardware; High level synthesis; Moore´s Law; Power system management; Quality management; Timing; abstraction; design and test; hardware design; high-level synthesis;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2009.80
  • Filename
    5209956