• DocumentCode
    1303738
  • Title

    High-Level Dataflow Transformations Using Taylor Expansion Diagrams

  • Author

    Ciesielski, Maciej ; Guillot, Jeremie ; Gomez-Prado, Daniel ; Boutillon, Emmanuel

  • Author_Institution
    Univ. of Massachusetts, Amherst, MA, USA
  • Volume
    26
  • Issue
    4
  • fYear
    2009
  • Firstpage
    46
  • Lastpage
    57
  • Abstract
    This article provides an overview of a canonical representation for arithmetic expressions and how it can be used to obtain various factorizations of such expressions to optimize them. The applicability of the approach is demonstrated in a high-level synthesis flow.
  • Keywords
    circuit analysis computing; high level synthesis; Taylor expansion diagram; arithmetic expression; high-level dataflow transformation; high-level synthesis flow; Algorithm design and analysis; Computer graphics; Delay; Design optimization; Digital signal processing; Hardware; High level synthesis; Optimization methods; Resource management; Taylor series; Taylor expansion diagrams; dataflow graphs; design and test; high-level synthesis; symbolic algebra;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2009.82
  • Filename
    5209962
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1303738