DocumentCode :
130428
Title :
Security evaluation of bistable ring PUFs on FPGAs using differential and linear analysis
Author :
Yamamoto, Dai ; Takenaka, Mitsuru ; Sakiyama, Kazuo ; Torii, Naoya
Author_Institution :
Fujitsu Labs. Ltd., Kawasaki, Japan
fYear :
2014
fDate :
7-10 Sept. 2014
Firstpage :
911
Lastpage :
918
Abstract :
Physically Unclonable Function (PUF) is expected to be an innovation for anti-counterfeiting devices for secure ID generation, authentication, etc. In this paper, we propose novel methods of evaluating the difficulty of predicting PUF responses (i.e. PUF outputs), inspired by well-known differential and linear cryptanalysis. According to the proposed methods, we perform a first third-party evaluation for Bistable Ring PUF (BR-PUF), proposed in 2011. The BR-PUFs have been claimed that they have a resistance against the response predictions. Through our experiments using FPGAs, we demonstrate, however, that BR-PUFs have two types of correlations between challenges and responses, which may cause the easy prediction of PUF responses. First, the same responses are frequently generated for two challenges (i.e. PUF inputs) with small Hamming distance. A number of randomly-generated challenges and their variants with Hamming distance of one generate the same responses with the probability of 0.88, much larger than 0.5 in ideal PUFs. Second, particular bits of challenges in BR-PUFs have a great impact on the responses. The value of responses becomes `1´ with the high probability of 0.71 (> 0.5) when just particular 5 bits of 64-bit random challenges are forced to be zero or one. In conclusion, the proposed evaluation methods reveal that BR-PUFs on FPGAs have some correlations of challenge-response pairs, which helps an attacker to predict the responses.
Keywords :
cryptography; field programmable gate arrays; BR-PUF; FPGA; Hamming distance; bistable ring PUF security evaluation; challenge-response pairs; differential cryptanalysis; linear cryptanalysis; physically unclonable function; randomly-generated challenges; Cryptography; Education; Field programmable gate arrays; Ink; Logic gates; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Science and Information Systems (FedCSIS), 2014 Federated Conference on
Conference_Location :
Warsaw
Type :
conf
DOI :
10.15439/2014F122
Filename :
6933112
Link To Document :
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