Title :
A flexible redundancy technique for high-density DRAMs
Author :
Horiguchi, Masashi ; Etoh, Jun ; Aoki, Masakazu ; Itoh, Kiyoo ; Matsumoto, Tetsurou
Author_Institution :
Hitachi Ltd., Tokyo, Japan
fDate :
1/1/1991 12:00:00 AM
Abstract :
The limitations of conventional redundancy techniques are pointed out and a novel redundancy technique is proposed for high-density DRAMs using multidivided data-line structures. The proposed technique features a flexible relationship between spare lines and spare decoders, as well as lower probability of unsuccessful repair. With this technique the yield improvement factor of 64-Mb DRAMs and beyond is estimated to be more than twice that with the conventional technique in the early stages of production
Keywords :
DRAM chips; probability; redundancy; 64 MB; flexible redundancy; high-density DRAMs; multidivided data-line structures; probability; production yield; spare decoders; spare lines; unsuccessful repair; yield improvement factor; Decoding; Degradation; Laboratories; Noise generators; Production; Random access memory; Semiconductor memory; Signal generators; Signal to noise ratio; Yield estimation;
Journal_Title :
Solid-State Circuits, IEEE Journal of
