Title :
A high-voltage polysilicon TFT with multigate structures
Author :
Uemoto, Yasuhiro ; Fujii, Eiji ; Emoto, Fumiaki ; Nakamura, Akira ; Senda, Kohji
Author_Institution :
Matsushita Electron. Corp., Osaka, Japan
fDate :
1/1/1991 12:00:00 AM
Abstract :
An approach is proposed for obtaining a high-voltage thin-film transistor (TFT) with multigate structure where polysilicon TFTs are connected in series. A basic principle for high-voltage operation has been investigated in detail through calculations based on a model describing log IDS-VGS characteristics observed in a single-gate polysilicon TFT. It has been found that off-state (VGS<0) operation of the polysilicon TFT causes a large increase of breakdown voltage of the multigate TFT with the result that a nearly equal fraction of drain voltage is applied across the region around each elemental TFT. The breakdown voltage of drain of the fabricated multigate TFT which has five elemental TFTs has been elevated up to 80 V
Keywords :
elemental semiconductors; power transistors; semiconductor device models; silicon; thin film transistors; 80 V; Si-SiO2; breakdown voltage; drain voltage; high-voltage polysilicon TFT; log I-V characteristics; model; multigate structures; off-state operation; series connection; Breakdown voltage; Impurities; Insulation; P-n junctions; Semiconductor films; Silicon; Substrates; Testing; Thin film transistors; Voltage control;
Journal_Title :
Electron Devices, IEEE Transactions on
