DocumentCode
1305404
Title
Reconciling Spice results and hand calculations: unexpected problems
Author
Brown, William L. ; Szeto, Andrew Y.J.
Author_Institution
Dept. of Electr. & Comput. Eng., San Diego State Univ., CA, USA
Volume
43
Issue
1
fYear
2000
fDate
2/1/2000 12:00:00 AM
Firstpage
43
Lastpage
51
Abstract
In an earlier paper, the authors analyzed and offered solutions to several discrepancies that often arise when electronic engineering students seek to understand and reconcile their hand calculations with Spice simulation results. This paper presents several additional commonly encountered, but quite unexpected, problems that frustrate and confuse students. In particular, the authors discuss the difficulties that arise from the use of Miller compensation in the middle gain stage of a typical bipolar op amp, the discrepancies that occur when a transistor is operating in “high level injection region”, the techniques for minimizing the voltage offsets when the input transistors match perfectly and the difficulties in calculating common mode rejection ratio caused by the difference between the AC and DC gains of current mirrors
Keywords
SPICE; circuit simulation; electronic engineering education; semiconductor device models; Miller compensation; Spice simulation results; bipolar op amp; common mode rejection ratio; current mirrors; electronic engineering students; gain differences; hand calculations; high-level injection region transistor operation; middle gain stage; voltage offsets; Analytical models; Circuit simulation; Circuit stability; Electric resistance; Equations; Frequency; Mirrors; Operational amplifiers; SPICE; Voltage;
fLanguage
English
Journal_Title
Education, IEEE Transactions on
Publisher
ieee
ISSN
0018-9359
Type
jour
DOI
10.1109/13.825739
Filename
825739
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