DocumentCode :
130560
Title :
A 49-dB DR wide locking range hybrid AGC for an ISM-band receiver in 0.18 um CMOS
Author :
Ying Song ; Xiaobao Yu ; Zongming Jin ; Baoyong Chi
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear :
2014
fDate :
27-30 Aug. 2014
Firstpage :
1
Lastpage :
3
Abstract :
A wide locking range hybrid automatic gain control (AGC) loop for an ISM-band receiver is presented. It is composed of a three-stage Programmable Gain Amplifier (PGA), a differential-output Received Signal Strength Indicator (RSSI), a SAR ADC and control algorithm logic. The indicator´s transfer function is realized in three segments, each of them covering 20dBm input range, in order to achieve higher sensitivity. The PGA gain can be configured either automatically by the AGC loop, or manually through the SPI interface. Implemented in 0.18um CMOS, measurement results show that the PGA dynamic range covers from 0.2 to 49.3dB, with 0.98 dB gain steps on average. The RSSI achieves maximum 70mV/dBm input sensitivity and 0.3-1.4V output range with a simulated maximum settling time of 8us. The proposed AGC consumes 3.2 mA current from a 1.7V supply.
Keywords :
CMOS integrated circuits; analogue-digital conversion; automatic gain control; operational amplifiers; transfer functions; AGC loop; CMOS integrated circuit; ISM-band receiver; PGA; RSSI; SAR ADC; current 3.2 mA; hybrid AGC; hybrid automatic gain control; programmable gain amplifier; received signal strength indicator; size 0.18 mum; transfer function; voltage 0.3 V to 1.4 V; voltage 1.7 V; wide locking range; Automatic generation control; CMOS integrated circuits; Dynamic range; Electronics packaging; Gain; Gain control; Receivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio-Frequency Integration Technology (RFIT), 2014 IEEE International Symposium on
Conference_Location :
Hefei
Type :
conf
DOI :
10.1109/RFIT.2014.6933265
Filename :
6933265
Link To Document :
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