Differential stacked spiral inductor and transistor layout designs for broadband high-speed circuits

This paper studies the customized differential stacked spiral inductor (DSSI) and transistor layout designs for broadband high-speed circuits. Compared with the inductor provided in foundry process design kits (PDK), the DSSI increases the inductance density by 3 times and at the same time enlarges the self-resonance frequency by 11.5%. The impact of different differential pair layout styles is compared with post-layout simulations. Moreover, a 4-stage ring oscillator consisting of the DSSI and the half-inter-digitated differential pair layout is fabricated in 65-nm CMOS technology to validate the effectiveness of the presented layout methods. Based on these findings, recommended layout guidelines for broadband circuits are provided.