Title :
Gauss-elimination-based generation of multiple seed-polynomial pairs for LFSR
Author :
Huang, Li-Ren ; Jou, Jing-Yang ; Kuo, Sy-Yen
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
9/1/1997 12:00:00 AM
Abstract :
This paper presents a new and efficient strategy of pseudorandom pattern generation (PRPG) for IC testing. It uses a general programmable LFSR (P-LFSR) to offer multiple-seed and multiple-polynomial PRPG. The deterministic pattern set generated by an ATPG tool or supplied by the designers is used to guide the generation of pseudorandom patterns. A novel application of the Gauss-elimination procedure is proposed to find the seeds as well as the polynomials. With an intelligent heuristic to further utilize the essential faults, this approach becomes very efficient, even for the random pattern resistant (RPR) circuits. Experiments are conducted on the ISCAS-85 benchmarks and the full scan version of the ISCAS-89 benchmarks. For all benchmark circuits, complete fault coverage is achieved with good balance on the hardware overhead and the test lengths as compared to other schemes
Keywords :
automatic testing; built-in self test; circuit feedback; integrated circuit testing; logic testing; polynomials; shift registers; ATPG; BILBO; BIST; Gauss elimination; IC testing; deterministic pattern set; fault coverage; intelligent heuristic; linear feedback shift register; mixed-mode testing; multiple seed-polynomial pairs; multiple-polynomial PRPG; multiple-seed PRPG; programmable LFSR; pseudorandom pattern generation; random pattern resistant circuit; Benchmark testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Gaussian processes; Hardware; Integrated circuit testing; Test pattern generators;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on