DocumentCode :
1305826
Title :
Save big, don´t go small - [electronics chip design]
Author :
Edwards, C.
Volume :
4
Issue :
13
fYear :
2009
Firstpage :
36
Lastpage :
37
Abstract :
Since the late 1990s, people have complained bitterly about the rapidly rising cost of nonrecurrent engineering (NRE) charges on chip designs and what would quickly become the biggest component of those charges: the amount of money needed to make a full set of layout masks. In little more than ten years, the price for a mask set went from tens of thousands of dollars through hundreds of thousands and now sits in the glow millions. This paper discussed the chips design process and use a new model to deep-submicron that can massively reduce the capital investment. The majority of fabless companies will definitely require a new model. The COT model can only be used by companies with huge operational teams. The majority will need a new model.
Keywords :
application specific integrated circuits; integrated circuit design; COT model; application-specific integrated circuit; chips design; nonrecurrent engineering;
fLanguage :
English
Journal_Title :
Engineering & Technology
Publisher :
iet
ISSN :
1750-9637
Type :
jour
Filename :
5212680
Link To Document :
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