Title :
A 2-V, 2-GHz low-power direct digital frequency synthesizer chip-set for wireless communication
Author :
Yamagishi, Akihiro ; Ishikawa, Masayuki ; Tsukahara, Tsuneo ; Date, Shigeru
Author_Institution :
NTT Wireless Syst. Labs., Kanagawa, Japan
fDate :
2/1/1998 12:00:00 AM
Abstract :
A 2 GHz direct digital frequency synthesizer (DDFS) chip-set is presented which operates at a very low supply voltage of 2 V. The chip-set consists of a CMOS DDFS LSI which synthesizes a sine wave at 55 Msps with an internal 10 b digital-to-analog converter (DAC) and Si bipolar image-reject up-converters. To achieve both high purity and low power dissipation, we developed a distortion-free up-conversion architecture and an efficient ROM output bit-width reduction technique. Operation of 2 V for the entire chip-set becomes possible because of the use of both multithreshold-voltage CMOS in the D/A converters and current-folded double-balanced mixers in the microwave up-converters. The synthesizer achieves a wide spurious-free dynamic range of 50 dB and a low power dissipation of less than 160 mW at 2 GHz
Keywords :
CMOS digital integrated circuits; UHF frequency convertors; UHF integrated circuits; UHF mixers; bipolar analogue integrated circuits; digital-analogue conversion; direct digital synthesis; large scale integration; radio equipment; 160 mW; 2 GHz; 2 V; CMOS LSI; D/A converters; DAC; ROM output bit-width reduction technique; Si; Si bipolar image-reject upconverters; current-folded double-balanced mixers; direct digital frequency synthesizer; distortion-free upconversion architecture; low-power DDS chip-set; multithreshold-voltage CMOS; wireless communication; Communication switching; Digital-analog conversion; Frequency conversion; Frequency synthesizers; Laboratories; Microwave generation; Power dissipation; Power supplies; Time division multiple access; Wireless communication;
Journal_Title :
Solid-State Circuits, IEEE Journal of
