• DocumentCode
    1306459
  • Title

    Single sided switching networks

  • Author

    Gordon, Josh ; Srikanthan, S.

  • Author_Institution
    Div. of Electr. Eng., Hatfield Polytech., UK
  • Volume
    26
  • Issue
    4
  • fYear
    1990
  • Firstpage
    248
  • Lastpage
    250
  • Abstract
    A novel and simple architecture for realising single-sided, rearrangeably-nonblocking, N-port switching networks (N is a power of 2), that uses N/2 log (N/2) elements, together with an efficient routing algorithm with time complexity O(N log (N)) is presented. The networks also exhibit a useful measure of fault tolerance.
  • Keywords
    circuit layout; multiport networks; switching networks; N-port switching networks; efficient routing algorithm; fault tolerance; matrix switches; single sided switching networks; time complexity;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19900166
  • Filename
    82588
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1306459