• DocumentCode
    1306484
  • Title

    Test generation for multiple state-table faults in finite-state machines

  • Author

    Pomeranz, Irith ; Reddy, Sudhakar M.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
  • Volume
    46
  • Issue
    7
  • fYear
    1997
  • fDate
    7/1/1997 12:00:00 AM
  • Firstpage
    783
  • Lastpage
    794
  • Abstract
    A test generation procedure to detect multiple state-table faults in finite-state machines is proposed. The importance of multiple state-table faults and their advantages as test generation objectives to avoid the need for checking experiments are considered. The proposed procedure is based on a new method for implicit enumeration of large numbers of multiple faults by using incompletely specified faulty machines. Experimental results are presented to demonstrate the effectiveness of implicit fault enumeration in detecting large numbers of multiple faults and in guaranteeing detection of all the faults or all the faults up to a specific multiplicity
  • Keywords
    fault location; finite state machines; logic testing; finite-state machines; implicit enumeration; implicit fault enumeration; multiple state-table faults; test generation; Error correction; Fault detection; Logic testing; Testing;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.599899
  • Filename
    599899