Design of real-time image enhancement preprocessor for CMOS image sensor

Author

Jung, Yun Ho ; Kim, Jae Seok ; Bong Soo Hur ; Kang, Moon Gi

Author_Institution

Dept. of Electron. Eng., Yonsei Univ., Seoul, South Korea

Volume

46

Issue

1

fYear

2000

fDate

2/1/2000 12:00:00 AM

Firstpage

68

Lastpage

75

Abstract

This paper presents a design of the real-time digital image enhancement preprocessor for a CMOS image sensor. The CMOS image sensor offers various advantages while it provides lower-quality images than the CCD does. In order to compensate for the physical limitation of the CMOS sensor, a spatially adaptive contrast enhancement algorithm was incorporated into the preprocessor with color interpolation, gamma correction, and automatic exposure control. The efficient hardware architecture for the preprocessor is proposed and was simulated in VHDL. It is composed of about 19 K logic gates, which is suitable for a low-cost one-chip PC camera. The test system was implemented on a FPGA chip in real-time mode, and performed successfully

Keywords

CMOS image sensors; CMOS logic circuits; cameras; circuit simulation; digital signal processing chips; field programmable gate arrays; hardware description languages; image colour analysis; image enhancement; interpolation; CMOS image sensor; FPGA chip; VHDL; automatic exposure control; color interpolation; digital image enhancement; efficient hardware architecture; gamma correction; logic gates; low-cost one-chip PC camera; real-time image enhancement preprocessor design; spatially adaptive contrast enhancement algorithm; test system; Adaptive control; Automatic control; CMOS image sensors; Charge coupled devices; Color; Digital images; Gamma ray detectors; Image enhancement; Interpolation; Programmable control;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.826383

Filename

826383