Multi-operand modulo addition using carry save adders

The authors compare two approaches for computing S= Sigma _i^k₌₁, X_i (mod N) using carry save adders. The biased addition technique keeps the partial carry and sum vectors C+S biased by p=2ⁿ-N where n=log₂ N. The sign estimation technique proposed computes the sign of C+S-N using a 2-bit carry look-ahead logic. The sign estimation algorithm restricts the partial sum to a smaller range, and thus, performs the final reduction faster than the biased addition algorithm.