Title :
Worst-case test vectors for functional failure induced by total dose in CMOS microcircuits with transmission gates
Author :
Abou-Auf, A.A. ; Barbe, D.F. ; Rushdi, M.M.
Author_Institution :
U.S. Army Res. Lab., Adelphi, MD, USA
fDate :
12/1/1997 12:00:00 AM
Abstract :
Fault models for total-dose induced functional failure in CMOS microcircuits containing transmission gates have been developed for the automatic generation of worst-case test vectors. We use the circuits in the CMOSN Cell Library. This analysis is supported by SPICE simulation that utilizes experimentally extracted transistor parameters. We have also used our analysis to interpret data from a previous total-dose testing of a test chip designed using the CMOSN Cell Library and fabricated using 1 μ technology
Keywords :
CMOS integrated circuits; SPICE; circuit analysis computing; digital simulation; failure analysis; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; radiation effects; CMOS microcircuits; SPICE simulation; experimentally extracted transistor parameters; functional failure; total dose; transmission gates; worst-case test vectors; Analytical models; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Data analysis; Data mining; Libraries; SPICE; Semiconductor device modeling;
Journal_Title :
Nuclear Science, IEEE Transactions on
