Title :
An analytical model of simultaneous switching noise in CMOS systems
Author :
Cha, Hye-Ran ; Kwon, Oh-Kyong
Author_Institution :
Dept. of Electron. & Electr. Eng., Hanyang Univ., Seoul, South Korea
fDate :
2/1/2000 12:00:00 AM
Abstract :
An accurate and analytical model for simultaneous switching noise (SSN) on ground lines in CMOS circuits is presented. This model can compute SSN for the case where only some drivers switch and the others remain quiet, that is, the model considers the loading effects on the quiet drivers. It was confirmed that the proposed model is more accurate than the existing ones through HSPICE simulation using the level 28 model for short-channel MOSFETs. The proposed model can provide useful design guides for CMOS driver circuits
Keywords :
CMOS integrated circuits; SPICE; circuit simulation; driver circuits; integrated circuit modelling; integrated circuit noise; CMOS circuits; HSPICE simulation; driver circuits; ground lines; loading effects; quiet drivers; simultaneous switching noise; Analytical models; Circuit noise; Circuit simulation; Computational modeling; Driver circuits; Load modeling; MOSFETs; Semiconductor device modeling; Switches; Switching circuits;
Journal_Title :
Advanced Packaging, IEEE Transactions on
DOI :
10.1109/6040.826763
