• DocumentCode
    1308570
  • Title

    Part II: Logic circuit simulation

  • Author

    Acken, John M. ; Stauffer, Jerry D.

  • Author_Institution
    Sandia Labs., Albuquerque, NM, USA
  • Volume
    1
  • Issue
    2
  • fYear
    1979
  • fDate
    6/1/1979 12:00:00 AM
  • Firstpage
    3
  • Lastpage
    12
  • Abstract
    For pt.I see ibid., vol.1, no.2 (1979). The basic structure, simulation control language, and characteristics of the logic simulation program, SALOGS IV, are described. This code is a time-based, table-driven simulator, can be used in the 4- or 8-state mode, contains complex built-in delay and gate level models, and has a functional modelling capability.
  • Keywords
    circuit CAD; digital simulation; large scale integration; logic design; structured programming; 4 or 8 state simulator; LSI; SALOGS IV; builtin delay; circuit CAD; code characteristics; digital simulation; functional modelling capability; gate level models; logic circuit simulation; logic simulation program; program structure; simulation control language; structured programming; time based table driven simulator; Algorithms; Circuit faults; Computational modeling; Delay; Integrated circuit modeling; Inverters; Logic gates;
  • fLanguage
    English
  • Journal_Title
    Circuits & Systems Magazine
  • Publisher
    ieee
  • ISSN
    0163-6812
  • Type

    jour

  • DOI
    10.1109/MCAS.1979.6323552
  • Filename
    6323552
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1308570