Total-dose and SEU characterization of 0.25 micron CMOS/SOI integrated circuit memory technologies

Author

Brothers, C. ; Pugh, R. ; Duggan, P. ; Chavez, J. ; Schepis, D. ; Yee, D. ; Wu, S.

Author_Institution

Phillips Lab., Space Mission Technol. Div., Kirtland AFB, NM, USA

Volume

44

Issue

6

fYear

1997

fDate

12/1/1997 12:00:00 AM

Firstpage

2134

Lastpage

2139

Abstract

Total-dose and single-event-effect radiation characterization of 0.25 micron test macro SRAMs fabricated at IBM´s East Fishkill research foundry in un-hardened bulk and un-hardened partially-depleted SOI silicon, are reported. The design and fabrication process were optimized for high-performance and short access time using supply voltages of 2.5 V for the 64 K-bit and 1.8 V for the 144 K and 288 K-bit test macro SRAMs

Keywords

CMOS memory circuits; SRAM chips; gamma-ray effects; silicon-on-insulator; 0.25 micron; 1.8 V; 144 Kbit; 2.5 V; 288 Kbit; 64 Kbit; CMOS/SOI integrated circuit memory technology; SEU; Si-SiO₂; access time; design; fabrication; partially-depleted silicon; radiation response; single-event-effect; test macro SRAM; total dose; CMOS integrated circuits; CMOS memory circuits; CMOS technology; Circuit testing; Conducting materials; Dielectric substrates; Integrated circuit technology; Laboratories; Random access memory; Silicon on insulator technology;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.659028

Filename

659028