DocumentCode :
1309000
Title :
Cascode Loads and Amplifier Settling Behavior
Author :
Nairn, David G.
Author_Institution :
Dept. of Electr. & Comput. Eng, Univ. of Waterloo, Waterloo, ON, Canada
Volume :
59
Issue :
1
fYear :
2012
Firstpage :
44
Lastpage :
51
Abstract :
Cascode loads are commonly assumed to be frequency independent nevertheless: it is shown that cascode loads introduce a pole-zero pair into the amplifier´s frequency response. Unfortunately, when designing high-gain high-speed amplifiers based on “all NMOS signal path” concepts, the pole-zero pair introduced by the PMOS cascode is likely to be located near the amplifier´s closed-loop bandwidth. Unlike pole-zero pairs located far from the amplifier´s closed-loop bandwidth, the effect of pole-zero pairs located near the amplifier´s closed-loop bandwidth is highly dependent on the exact configuration of the amplifier. While not always possible, minimizing the capacitance on the cascode node minimizes the effects of this undesirable pole-zero pair.
Keywords :
amplifiers; frequency response; poles and zeros; PMOS cascode; all NMOS signal path; amplifier settling behavior; cascode loads; closed-loop bandwidth; frequency response; high-gain high-speed amplifiers; pole-zero pair; Bandwidth; Capacitance; Impedance; MOS devices; Operational amplifiers; Poles and zeros; Resistance; Analog circuits; MOSFET circuits; circuit analysis; operational amplifiers;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2011.2161414
Filename :
6003803
Link To Document :
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