• DocumentCode
    1309085
  • Title

    Systolic band-matrix multipliers

  • Author

    Luk, Wayne

  • Author_Institution
    Comput. Lab., Oxford Univ., UK
  • Volume
    26
  • Issue
    6
  • fYear
    1990
  • fDate
    3/15/1990 12:00:00 AM
  • Firstpage
    403
  • Lastpage
    405
  • Abstract
    Four methods for generating systolic band-matrix multipliers with different degrees of pipelining are presented. The tradeoffs in complexity and performance of the resulting designs are analysed.
  • Keywords
    VLSI; cellular arrays; digital integrated circuits; multiplying circuits; pipeline processing; complexity performance tradeoffs; degrees of pipelining; systolic band-matrix multipliers;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19900263
  • Filename
    82693
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1309085