Attenuation of single event induced pulses in CMOS combinational logic

Author

Baze, M.P. ; Buchner, S.P.

Author_Institution

Boeing Defense & Space Group, Seattle, WA, USA

Volume

44

Issue

6

fYear

1997

fDate

12/1/1997 12:00:00 AM

Firstpage

2217

Lastpage

2223

Abstract

Results are presented of a study of SEU generated transient pulse attenuation in combinational logic structures built using common digital CMOS design practices. SPICE circuit analysis, heavy ion tests, and pulsed, focused laser simulations were used to examine the response characteristics of transient pulse behavior in long logic strings. Results show that while there is an observable effect, it cannot be generally assumed that attenuation will significantly reduce observed circuit bit error rates

Keywords

CMOS logic circuits; SPICE; VLSI; circuit analysis computing; combinational circuits; ion beam effects; laser beam effects; logic testing; transient analysis; CMOS combinational logic; SPICE circuit analysis; VLSI; circuit bit error rates; digital CMOS design; focused laser simulations; heavy ion tests; pulsed lasers; response characteristics; single event induced pulses; transient pulse attenuation; transient pulse behavior; Attenuation; CMOS logic circuits; Circuit testing; Logic design; Logic testing; Optical attenuators; Optical pulse generation; Optical pulses; Pulse circuits; Single event upset;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.659038

Filename

659038