• DocumentCode
    1311039
  • Title

    A High-Performance Unified-Field Reconfigurable Cryptographic Processor

  • Author

    Chen, Jun-Hong ; Shieh, Ming-Der ; Lin, Wen-Ching

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
  • Volume
    18
  • Issue
    8
  • fYear
    2010
  • Firstpage
    1145
  • Lastpage
    1158
  • Abstract
    With rapid increases in communication and network applications, cryptography has become a crucial issue to ensure the security of transmitted data. In this paper, we propose a microcode-based architecture with a novel reconfigurable datapath which can perform either prime field GF(p) operations or binary extension field GF(2m) operations for arbitrary prime numbers, irreducible polynomials, and precision. Using these field arithmetic units, users are capable of programming cryptographic algorithms in microcode sequences for full compliance with a majority of public-key cryptographic algorithms such as Rivest-Shamir-Adleman (RSA) and elliptic curve cryptosystems. An algorithmic optimization or refinement can thus be made at a higher level based on the reconfigurable datapath. Experimental results show that the developed processor has full cryptography algorithm flexibility, high hardware utilization, and high performance.
  • Keywords
    optimisation; public key cryptography; reconfigurable architectures; Rivest-Shamir-Adleman cryptosystem; algorithmic optimization; arbitrary prime number; binary extension field; elliptic curve cryptosystem; field arithmetic unit; hardware utilization; high performance unified field reconfigurable cryptographic processor; irreducible polynomial; microcode sequence; microcode-based architecture; programming cryptographic algorithm; public-key cryptographic algorithm; reconfigurable datapath; Cryptographic processor; Rivest–Shamir–Adleman (RSA) cryptosystem; elliptic curve cryptography (ECC); finite field arithmetic (FFA); reconfigurable architecture;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2009.2020397
  • Filename
    5325648