DocumentCode
1311059
Title
A Lightweight High-Performance Fault Detection Scheme for the Advanced Encryption Standard Using Composite Fields
Author
Mozaffari-Kermani, Mehran ; Reyhani-Masoleh, Arash
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Western Ontario, London, ON, Canada
Volume
19
Issue
1
fYear
2011
Firstpage
85
Lastpage
91
Abstract
The faults that accidently or maliciously occur in the hardware implementations of the Advanced Encryption Standard (AES) may cause erroneous encrypted/decrypted output. The use of appropriate fault detection schemes for the AES makes it robust to internal defects and fault attacks. In this paper, we present a lightweight concurrent fault detection scheme for the AES. In the proposed approach, the composite field S-box and inverse S-box are divided into blocks and the predicted parities of these blocks are obtained. Through exhaustive searches among all available composite fields, we have found the optimum solutions for the least overhead parity-based fault detection structures. Moreover, through our error injection simulations for one S-box (respectively inverse S-box), we show that the total error coverage of almost 100% for 16 S-boxes (respectively inverse S-boxes) can be achieved. Finally, it is shown that both the application-specific integrated circuit and field-programmable gate-array implementations of the fault detection structures using the obtained optimum composite fields, have better hardware and time complexities compared to their counterparts.
Keywords
application specific integrated circuits; cryptography; fault diagnosis; field programmable gate arrays; AES; advanced encryption standard; application-specific integrated circuit; composite field S-box; error injection simulations; field-programmable gate-array; inverse S-box; lightweight concurrent fault detection; lightweight high-performance fault detection; parity-based fault detection; Application specific integrated circuits; Circuit faults; Circuit simulation; Cryptography; Electrical fault detection; Fault detection; Hardware; Protection; Read only memory; Robustness; AES; composite fields; error coverage; fault detection;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2009.2031651
Filename
5325652
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