• DocumentCode
    1311868
  • Title

    Physical modeling of the power VDMOST for computer-aided design of integrated circuit

  • Author

    Tsai, Chin-yu ; Burk, Dorothea E. ; Ngo, Khai D T

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA
  • Volume
    44
  • Issue
    3
  • fYear
    1997
  • fDate
    3/1/1997 12:00:00 AM
  • Firstpage
    472
  • Lastpage
    480
  • Abstract
    This paper presents a methodology for physical modeling of the vertical double-diffused MOS transistor (VDMOST) for power-integrated-circuit (PIC) design. The circuit model comprises the regional models derived from basic semiconductor equations. The unique features of the VDMOST such as quasi-saturation, nonlinear inter-electrode capacitances, reverse-recovery current, and temperature dependencies are accurately modeled based on device simulations. The composite model is implemented in Saber and SPICE2G.6 source code. It is verified against steady-state and capacitance-voltage measurements on test devices. A parameter extraction routine is developed, and a system that links ICCAP and Saber is set up that performs measurement, simulation, and parameter extraction. The application of the described model in computer-aided design (CAD) is demonstrated for several power-electronic circuits
  • Keywords
    MOS integrated circuits; SPICE; capacitance; circuit CAD; circuit analysis computing; integrated circuit design; power MOSFET; power integrated circuits; semiconductor device models; IC design; ICCAP; SPICE2G.6; Saber; capacitance-voltage measurements; computer-aided design; device simulations; nonlinear inter-electrode capacitances; parameter extraction routine; power VDMOST; power integrated circuits; power-electronic circuits; quasi-saturation; regional models; reverse-recovery current; vertical double-diffused MOS transistor; Capacitance; Capacitance-voltage characteristics; Circuit simulation; Design automation; MOSFETs; Nonlinear equations; Parameter extraction; Power system modeling; Steady-state; Temperature dependence;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.556158
  • Filename
    556158