Modeling and simulation of an instrumentation amplifier in high temperature using a VHDL-AMS op-amp model

In this paper, an “architectural” description of an instrumentation amplifier (in-amp) is used to simulate its common mode rejection ratio (CMRR) and voltage offset (VOS) in high temperature (HT). The simulations are achieved by using two different models of an industrial op-amp: the familiar SPICE macro-model and a customized VHDL-AMS model. By simulating these two parameters in HT, we evaluate in this work dependency between the op-amp model and the in-amp model. This dependency is described first by reviewing theoretical equations. We compare finally the VHDL-AMS simulation accuracy to the SPICE simulation accuracy in HT.