DocumentCode :
131215
Title :
Architectural impacts of emerging transistors
Author :
Horvath, Andras ; Hu, Xiaobo Sharon ; Nahas, Joseph ; Niemier, Michael ; Palit, Indranil ; Perricone, R. ; Sedighi, Behnam
Author_Institution :
Fac. of Inf. Technol., Pazmany Peter Catholic Univ., Budapest, Hungary
fYear :
2014
fDate :
22-25 June 2014
Firstpage :
69
Lastpage :
72
Abstract :
At present there is much effort to determine if emerging information processing devices could have a positive impact on the performance of non-Boolean/non-von Neumann computer architectures. We explore this topic here by specifically considering how emerging transistor technologies might impact cellular neural networks (CNNs). For CNNs, prior work suggests that new transistor structures could be employed to better facilitate non-binary outputs - that in turn reduce the number of template/programming operations as well as the hardware paths needed to solve a given problem. Here, we present analysis that considers how the above approach could impact the performance/energy of the cells that comprise the CNN. We also consider how characteristics of other emerging transistor technologies could positively impact CNNs - particularly with respect to reduced program complexity.
Keywords :
cellular neural nets; computer architecture; neural chips; transistor circuits; CNNs; cellular neural networks; hardware paths; information processing devices; nonBoolean-nonvon Neumann computer architectures; nonbinary outputs; reduced program complexity; template-programming operations; transistor architectural impacts; transistor structures; transistor technology; Benchmark testing; Computer architecture; Graphene; Logic gates; Performance evaluation; Transistors; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
New Circuits and Systems Conference (NEWCAS), 2014 IEEE 12th International
Conference_Location :
Trois-Rivieres, QC
Type :
conf
DOI :
10.1109/NEWCAS.2014.6933987
Filename :
6933987
Link To Document :
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