Title :
True Filterless Class-D Audio Amplifier
Author :
Teplechuk, Mykhaylo A. ; Gribben, Anthony ; Amadi, Christophe
Author_Institution :
Dialog Semicond. Ltd., Edinburgh, UK
Abstract :
The design of a fully integrated, filterless, class-D audio amplifier in standard 0.25- CMOS technology is described: a novel class-D amplifier architecture, where uniform pulsewidth modulation is introduced. The architecture attenuates residual clock signals around the loop allowing very low harmonic distortion, , to be achieved in conjunction with high PSRR, at 217 Hz. When driving 1.2 W into an 8- load, it achieves an SNR of 103 dB (A-weighted) with an efficiency of . The maximum output power at 1% THD is 3.1 W. Figures of merit are defined to establish that the amplifier exceeds the performance of alternative designs. The amplifier occupied a chip area 1.44 and was packaged as a WLCSP.
Keywords :
CMOS analogue integrated circuits; analogue circuits; audio-frequency amplifiers; pulse width modulation; chip area; low harmonic distortion; maximum output power; novel class-D amplifier architecture; power 1.2 W to 3.1 W; pulsewidth modulation; residual clock signals; standard 0.25- CMOS technology; true filterless class-D audio amplifier; Frequency modulation; Harmonic analysis; Pulse width modulation; Switches; Audio power amplifier; class-D amplifier; efficiency; filterless; intermodulation distortion (IMD); linearity; power supply rejection ratio (PSRR); pulsewidth modulation (PWM); sample and hold (SAH); switch mode amplifier; switching amplifiers; total harmonic distortion (THD); true filterless Class-D amplifier; uniform pulsewidth modulation (UPWM);
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2011.2162913