DocumentCode
131276
Title
Stochastic approximation register ADC
Author
Farahbakhshian, Farshad ; Waters, Allen ; Muhlestein, Jason ; Moon, Un-Ku
Author_Institution
Sch. of Electr. & Comput. Eng. Corvallis, Oregon State Univ., Corvallis, OR, USA
fYear
2014
fDate
22-25 June 2014
Firstpage
189
Lastpage
192
Abstract
In this paper a stochastic approximation register ADC is proposed. The ADC is capable of achieving an ENOB of up to 10 bits. The ADC is composed of a variable noise engine, a bank of comparators with Gaussian offset noise, and a DAC. The ADC is simulated to achieve over 10 ENOB across various non-idealities using a comparator bank containing 1200 digital-cell based comparators with an input referred offset standard deviation of 12 mV.
Keywords
Gaussian noise; analogue-digital conversion; approximation theory; comparators (circuits); ENOB; Gaussian offset noise; analog to digital converter; comparator bank; digital-cell based comparators; stochastic approximation register ADC; variable noise engine; Approximation methods; Engines; Maximum likelihood estimation; Noise; Registers; Signal resolution; Standards;
fLanguage
English
Publisher
ieee
Conference_Titel
New Circuits and Systems Conference (NEWCAS), 2014 IEEE 12th International
Conference_Location
Trois-Rivieres, QC
Type
conf
DOI
10.1109/NEWCAS.2014.6934015
Filename
6934015
Link To Document