Robust design methodology for switched capacitor delta sigma modulators based on current conveyors

An integrator architecture based on current conveyors (CCII) is introduced. Digital calibration is utilized to cancel out the non idealities present in CCII integrator and improve its performance. The proposed architecture is used in the design of a 2^nd order switched capacitor delta sigma modulator whose robustness is verified through corner simulations. The modulator designed in a 1V/90nm technology shows a 92dB DR and 80.4 dB SNDR for bandwidth of 200 kHz and clock frequency of 40 MHz.