FPGA implementation of voice activity detector for efficient speech enhancement

In this paper, a spectral subtraction method including voice activity detector (VAD), based on short-time energy, is implemented on FPGA for efficient speech enhancement. The proposed architecture is implemented using Xilinx System Generator for DSP and Digilent Nexys-4 board based on Artix-7 FPGA. Performances obtained by spectral subtraction with VAD are compared to those obtained by the one without VAD, using amplitude-modulated additive noise. Required resources and maximum operating frequency are also presented.