• DocumentCode
    1313305
  • Title

    Model minimisation for electron devices using simulated annealing in conjunction with parameter extraction

  • Author

    Vai, M.-K. ; Ng, D. ; Prasad, S.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Northwestern Univ., Boston, MA, USA
  • Volume
    26
  • Issue
    13
  • fYear
    1990
  • fDate
    6/21/1990 12:00:00 AM
  • Firstpage
    892
  • Lastpage
    894
  • Abstract
    A modelling process which includes both model minimisation and a parameter extraction is developed to obtain the best simulation speed while maintaining accuracy. The effectiveness of this approach is demonstrated by its application to the modelling of a transistor. Significant simulation time saving is observed and the simulation accuracy is adequately maintained.
  • Keywords
    equivalent circuits; minimisation; optimisation; semiconductor device models; electron devices; model minimisation; modelling process; parameter extraction; simulated annealing; simulation accuracy; transistor;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19900583
  • Filename
    82832
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1313305