Title :
Architecture Support for Dynamic Integrity Checking
Author :
Kanuparthi, Arun K. ; Zahran, Mohamed ; Karri, Ramesh
Author_Institution :
Dept. of Electr. & Comput. Eng., Polytech. Inst. of New York Univ., Brooklyn, NY, USA
Abstract :
A trusted platform module (TPM) enhances the security of general purpose computer systems by authenticating the platform at boot time. Security can often be compromised due to the presence of vulnerabilities in the trusted software that is executed on the system. Existing TPM architectures do not support runtime integrity checking and this allows attackers to exploit these vulnerabilities to modify the program after it has been verified (at time of check or TOC) but before the time of its use (at time of use or TOU) to trigger unintended program behavior, such as the execution of malicious code or the leaking of sensitive data. In this paper, we present a dynamic integrity checker (DIC) to improve security by thwarting TOCTOU attacks. The paper makes four contributions. First, we show how to integrate the integrity checker module with a superscalar pipeline. Second, we present an architecture for dynamic integrity checking by monitoring the dynamic execution traces of the program. Third, we present several optimizations to reduce performance impact without compromising the security of the system. Finally, we evaluate the proposed scheme using a cycle-accurate simulator. Results indicate that the proposed technique enhances security against the TOCTOU attacks with 8% performance overhead and 2.52% area overhead over a baseline processor.
Keywords :
computer architecture; trusted computing; TOCTOU attacks; TPM architectures; architecture support; baseline processor; cycle-accurate simulator; dynamic integrity checking; general purpose computer system security; malicious code execution; platform authentication; program dynamic execution traces; runtime integrity checking; sensitive data leak; superscalar pipeline; time of check; time of use; trusted platform module; Computer architecture; Cryptography; Pipelines; Semiconductor device measurement; Software; System-on-a-chip; Computers and information processing; computer architecture; computer security;
Journal_Title :
Information Forensics and Security, IEEE Transactions on
DOI :
10.1109/TIFS.2011.2166960