Title :
Fabrication of a MTJ-based multilevel resistor towards process-variaton-resilient logic LSI
Author :
Natsui, Masanori ; Hanyu, Takahiro
Author_Institution :
Res. Inst. of Electr. Commun., Tohoku Univ., Sendai, Japan
Abstract :
A nonvolatile multilevel resistor cell based on magnetic tunnel junction (MTJ) device is proposed for process-variation-resilient logic LSIs. The proposed cell is designed by the series-parallel connection of several “unit” MTJ devices, and its resistance value can be changed by using only one write path. Its basic behavior is simulated by using a SPICE simulator with built-in MTJ device model. The measurement result of a fabricated TEG circuit is also demonstrated.
Keywords :
integrated circuit modelling; integrated logic circuits; large scale integration; magnetic tunnelling; MTJ-based multilevel resistor fabrication; SPICE simulator; built-in MTJ device model; fabricated TEG circuit; magnetic tunnel junction device; nonvolatile multilevel resistor cell; process-variaton-resilient logic LSI; resistance value; series-parallel connection; write path; Computer architecture; Junctions; Magnetic tunneling; Resistance; Resistors; Transistors; Very large scale integration; Beyond CMOS; Logic circuit; Magnetic tunnel junction device; Post-process variation compensation;
Conference_Titel :
New Circuits and Systems Conference (NEWCAS), 2014 IEEE 12th International
Conference_Location :
Trois-Rivieres, QC
DOI :
10.1109/NEWCAS.2014.6934084
