Title :
Digital Circuit Redundancy
Author_Institution :
M. I. T. Lincoln Laboratory, Lexington, Mass.
fDate :
6/1/1964 12:00:00 AM
Abstract :
While some original work is presented, this paper is mainly of the nature of a survey of redundancy techniques to date. Several redundancy techniques are described in detail with mathematical models for estimating reliability improvement. The methods are compared on the basis of reliability improvement and general comments are made about applications. The reliability equations for Moore-Shannon, majority, gate connector, and other redundancies, show that Moore-Shannon type of redundancy provides the best reliability improvement An example of a Moore-Shannon redundant flip-flop shows that large reliability improvements are obtained applying redundancy to only the less reliable components, thus keeping the amount of redundancy to a minimum.
Keywords :
Costs; Digital circuits; Energy consumption; Hardware; Joining processes; Maintenance; Mathematical model; Redundancy; Relays; Telephony;
Journal_Title :
Reliability, IEEE Transactions on
DOI :
10.1109/TR.1964.5214855