DocumentCode
1316
Title
Fully integrated four-input combining receiver front-end circuit for laser radar with static unitary detector
Author
Lee, Eun-Gyu ; An, Jubai ; Kim, Choul-Young
Author_Institution
Electron. Eng. Dept., Chungnam Nat. Univ. (CNU), Daejeon, South Korea
Volume
50
Issue
21
fYear
2014
fDate
October 9 2014
Firstpage
1543
Lastpage
1545
Abstract
A fully integrated four-input combining receiver front-end circuit is designed in a 0.18 μm CMOS technology for laser radar with a static unitary detector (STUD). This circuit consists of four independent transimpedance amplifiers, one signal combiner, a balun and an output buffer in one single integrated chip. The circuit provides 16.2 mW power consumption for a 1.8 V supplied voltage and 59.8 dBΩ transimpedance gain in the implemented experimental prototype for electrical pulse measurement. The fabricated prototype is worked exactly the same as the operation principle of the STUD in the two-dimensional optical pulse scanning measurement. Therefore, the proposed circuit is available for the STUD-based laser detection and ranging (LADAR) system as one integrated chip. This is the first demonstrated IC for the STUD-based laser radar system.
Keywords
CMOS integrated circuits; baluns; buffer circuits; operational amplifiers; optical radar; power consumption; pulse measurement; radar receivers; 2D optical pulse scanning measurement; CMOS technology; LADAR system; STUD-based laser detection and ranging system; STUD-based laser radar system; TIA; balun; electrical pulse measurement; four-input combining receiver front-end circuit; integrated chip; output buffer; power 16.2 mW; power consumption; size 0.18 mum; static unitary detector; transimpedance amplifier; transimpedance gain; two-dimensional optical pulse scanning measurement; voltage 1.8 V;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2014.1929
Filename
6926981
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