Hybrid 11 Gbit/s parallel processing decision circuit using submicron silicon bipolar ICs

The design and implementation of a submicron-silicon bipolar parallel processing master-slave D-type flip-flop decision circuit, operating at data rates as high as 11 Gbit/s is described. This is the fastest reported decision circuit for silicon bipolar technology. The ICs used in the hybrid circuit were fabricated using a 0.6 mu m, non-polysilicon emitter technology, and mounted in a package employing coplanar waveguides.