• DocumentCode
    1316361
  • Title

    Removal of sign-extension circuitry from Booth´s algorithm multiplier-accumulators

  • Author

    Burgess, Neil

  • Author_Institution
    Dept. of Electr. Eng. & Electron., Brunel Univ., Uxbridge, UK
  • Volume
    26
  • Issue
    17
  • fYear
    1990
  • Firstpage
    1413
  • Lastpage
    1415
  • Abstract
    A technique for converting the partial products in a modified Booth´s algorithm multiplier from two´s complement form to unsigned form, therefore eliminating the need for sign-extension circuitry is described. A proof is provided and an example of a multiply-accumulator given.
  • Keywords
    VLSI; digital arithmetic; digital signal processing chips; integrated logic circuits; Booth´s algorithm multiplier-accumulators; VLSI multiply-accumulators; partial products; proof; sign extension circuitry elimination; unsigned form;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19900908
  • Filename
    83017
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1316361