• DocumentCode
    1316437
  • Title

    Novel merged BiCMOS circuit structures

  • Author

    Bellaouar, Abdellatif ; Elmasry, M.I.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
  • Volume
    26
  • Issue
    19
  • fYear
    1990
  • Firstpage
    1555
  • Lastpage
    1556
  • Abstract
    Novel merged BiCMOS circuit structures are presented. They offer an area saving of 20-30% compared with conventional BiCMOS structures. The DC and the transient performance of the merged structures are verified using the two-dimensional PISCES-IIB device simulator.
  • Keywords
    BIMOS integrated circuits; VLSI; circuit layout; digital integrated circuits; digital simulation; integrated circuit technology; BiCMOS structures; DC performance; area saving; merged BiCMOS circuit structures; merged structures; submicron; transient performance; two-dimensional PISCES-IIB device simulator;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19900998
  • Filename
    83031
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1316437