Title :
Novel merged BiCMOS circuit structures
Author :
Bellaouar, Abdellatif ; Elmasry, M.I.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Abstract :
Novel merged BiCMOS circuit structures are presented. They offer an area saving of 20-30% compared with conventional BiCMOS structures. The DC and the transient performance of the merged structures are verified using the two-dimensional PISCES-IIB device simulator.
Keywords :
BIMOS integrated circuits; VLSI; circuit layout; digital integrated circuits; digital simulation; integrated circuit technology; BiCMOS structures; DC performance; area saving; merged BiCMOS circuit structures; merged structures; submicron; transient performance; two-dimensional PISCES-IIB device simulator;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19900998
