Title :
Low-power CMOS current conveyor
Author :
Ismail, Abdul Manaff ; Soliman, A.M.
Author_Institution :
Dept. of Electron. & Commun. Eng., Cairo Univ., Giza, Egypt
fDate :
1/6/2000 12:00:00 AM
Abstract :
A novel second-generation CMOS current conveyor based on a new adaptive biasing technique is proposed. It is shown that the use of this circuit offers an excellent performance and leads to a significant reduction in the standby power dissipation. PSPICE simulation results, assuming 0.5 μm CMOS process, are also given
Keywords :
CMOS analogue integrated circuits; 0.5 micron; PSPICE simulation results; adaptive biasing technique; low-power electronics; second-generation CMOS current conveyor; standby power dissipation;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20000129
