• DocumentCode
    1316617
  • Title

    Optimisation of full-custom logic cells using response surface methodology

  • Author

    Scotti, M.V. ; Malik, Z. ; Cheung, P.Y.K. ; Nelder, J.

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK
  • Volume
    36
  • Issue
    1
  • fYear
    2000
  • fDate
    1/6/2000 12:00:00 AM
  • Firstpage
    14
  • Lastpage
    16
  • Abstract
    The authors demonstrate the significant advantages of response surface methodology for the optimisation of pass-transistor logic circuits with a large number of design variables. It is shown how the “curse of dimensionality” in this type of optimisation problem can be effectively dealt with by using methods from the set of techniques referred to as “design of experiments”
  • Keywords
    application specific integrated circuits; curse of dimensionality; design of experiments; design variables; full-custom logic cells; optimisation problem; pass-transistor logic circuits; response surface methodology;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20000046
  • Filename
    830487