Abstract :
Highly efficient power-gating systems beyond conventional CMOS technology could be realised using a new non-volatile flip-flop design based on a ´pseudo-spin-MOSFET´ (PSMOSFET), researchers in Japan have shown. The non-volatile flip-flop architecture is faster and uses less power than other backup architectures using ordinary flip-flops, and is compatible with existing CMOS fabrication and circuit technologies.
