Suitability Study of Oxide/Gallium Arsenide Interfaces for MOSFET Applications

The suitability of oxide/GaAs interfaces for MOSFET applications has been investigated. Electrical properties of Ga₂O₃/GaAs interfaces, dielectric stacks utilizing the Ga₂O₃/GaAs interface, and Al₂O₃/GaAs interfaces have been studied using a set of independent techniques, including admittance-voltage (ac C-V and G-V at 25°C and 150°C), quasi-static static C-V, photoluminescence intensity (PL-I), and MOSFET I-V measurements. The side-by-side comparison reveals the fundamental differences in their respective data sets. The GdGaO/Ga₂O₃/GaAs system has been found to exhibit a U-shaped D_it distribution with a midgap D_it plateau of 2 - 3 × 10¹¹ cm^-2 · eV^-1, which has allowed manufacturing GaAs MOSFETs with dc performance close to ideal model predictions. Some other ternary oxides such as GdScO₃ and LaAlO₃ can also be deposited on a Ga₂O₃ template without disrupting the Ga₂O₃/GaAs interface. Beyond GaAs bulk, the use of a surface heterostructure has been investigated, which shifts, in energy space, the mobile charge distribution in the channel layer away from a branch of rising D_it in the vicinity of Ec at the Ga₂O₃/GaAs interface. In contrast, Al₂O₃/GaAs(100) interfaces show a typical GaAs native oxide behavior with a <;5-shaped Dit distribution centered around the midgap and a pinned Fermi level. Although this study has been conducted with the objective of developing GaAs MOSFETs for RF power applications, it is recommended to apply an identical set of independent analytical techniques to the characterization of dielectric/semiconductor interfaces which are of interest for high-mobility CMOS channels such as In_xGa_1-xAs.