• DocumentCode
    1318544
  • Title

    Optimal design of p-buffer layer for GaAs power MESFET

  • Author

    Wang, Y.J. ; Meng, C.C.

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    32
  • Issue
    24
  • fYear
    1996
  • fDate
    11/21/1996 12:00:00 AM
  • Firstpage
    2282
  • Lastpage
    2283
  • Abstract
    The mechanisms for current conduction in the substrate of planar ion-implanted GaAs power MESFETs for wireless communication are investigated by 2D simulation. A properly doped p-buffer layer can eliminate the substrate conduction, but a too heavily doped p-buffer can reduce the saturation current (Idss) and the breakdown voltage significantly. Optimal design for the p-buffer of the MESFETs is described
  • Keywords
    III-V semiconductors; doping profiles; electric breakdown; gallium arsenide; ion implantation; power MESFET; 2D simulation; GaAs; GaAs power MESFET; breakdown voltage; current conduction; doped p-buffer layer; optimal layer design; planar ion-implanted MESFETs; saturation current; substrate conduction;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19961509
  • Filename
    556817
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1318544