• DocumentCode
    1319067
  • Title

    Pad Assignment for Die-Stacking System-in-Package Design

  • Author

    Mak, Wai-Kei ; Lin, Yu-Chen ; Chu, Chris ; Wang, Ting-Chi

  • Author_Institution
    Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
  • Volume
    31
  • Issue
    11
  • fYear
    2012
  • Firstpage
    1711
  • Lastpage
    1722
  • Abstract
    Wire bonding is currently the most popular method for connecting signals between dies in system-in-package (SiP) design. Pad assignment, which assigns inter-die signals to die pads so as to facilitate wire bonding, is an important physical design problem for SiP design because the quality of a pad assignment solution affects both the cost and the performance of an SiP design. In this paper, we study a pad assignment problem, which prohibits the generation of illegal crossings and aims to minimize the total signal wirelength, for die-stacking SiP design. We first consider the two-die cases and die-stacks with a bridging die, and present a minimum-cost flow-based approach to optimally solve them in polynomial time. We then describe an approach, which uses a modified left-edge algorithm and an integer linear programming technique, for pyramid die-stacks with no bridging die. Finally, we discuss extensions of the two approaches to handle additional design constraints. Encouraging experimental results are shown to support our approaches.
  • Keywords
    integer programming; integrated circuit design; lead bonding; linear programming; polynomials; system-in-package; bridging die; die pads; die-stacking SiP design; die-stacking system-in-package design; integer linear programming technique; inter-die signals; left-edge algorithm; minimum-cost flow-based approach; pad assignment; polynomial time; pyramid die-stacks; two-die cases; wire bonding; Algorithm design and analysis; Bonding; Indexes; Polynomials; Routing; Substrates; Wires; Die-stack; pad assignment; system-in-package; wire bonding;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2012.2202395
  • Filename
    6331649