• DocumentCode
    1319080
  • Title

    Computing Minimal Debugging Windows in Failure Traces of AMS Assertions

  • Author

    Mukherjee, Sayan ; Dasgupta, Parthasarathi

  • Author_Institution
    Samsung India Software Oper. Pvt. Ltd., Bangalore, India
  • Volume
    31
  • Issue
    11
  • fYear
    2012
  • Firstpage
    1776
  • Lastpage
    1781
  • Abstract
    There has been considerable focus recently on research on developing assertion checking capability with analog and mixed-signal (AMS) simulators. Such tools must be able to detect failures of assertions in simulation traces and report the windows in which failures have been detected. Due to the dense real time semantics of AMS assertions, the task of identifying the minimal debugging window for each failure is not a trivial problem. This paper addresses the problem of computing the minimal debugging window in failure traces for AMS assertions and presents an algorithm which is linear in regards to the size of the assertion and the size of the trace.
  • Keywords
    analogue simulation; circuit simulation; failure analysis; formal specification; formal verification; minimax techniques; program debugging; trees (mathematics); AMS assertion; AMS circuit simulator; analog simulator; assertion checking capability; failure detection; failure trace; minimal debugging windows; mixed-signal simulator; real time semantics; refutation min-max tree; simulation trace; trace size; Algorithm design and analysis; Boolean functions; Data structures; Debugging; Real-time systems; Semantics; Uncertainty; Counterexample; failure trace; temporal logic;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2012.2203599
  • Filename
    6331651