• DocumentCode
    1319158
  • Title

    Upset hardened memory design for submicron CMOS technology

  • Author

    Calin, T. ; Nicolaidis, M. ; Velazco, R.

  • Author_Institution
    TIMA/INPG Lab., Grenoble, France
  • Volume
    43
  • Issue
    6
  • fYear
    1996
  • fDate
    12/1/1996 12:00:00 AM
  • Firstpage
    2874
  • Lastpage
    2878
  • Abstract
    A novel design technique is proposed for storage elements which are insensitive to radiation-induced single-event upsets. This technique is suitable for implementation in high density ASICs and static RAMs using submicron CMOS technology
  • Keywords
    CMOS memory circuits; SRAM chips; application specific integrated circuits; integrated circuit design; radiation hardening (electronics); high density ASIC; memory design; radiation hardening; single-event upsets; static RAM; storage element; submicron CMOS technology; CMOS process; CMOS technology; Delay; Feedback circuits; Image storage; Laboratories; Latches; Power dissipation; Single event upset; Space technology;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/23.556880
  • Filename
    556880
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1319158