Monolithic 3-D Integration of SRAM and Image Sensor Using Two Layers of Single-Grain Silicon

Author

Derakhshandeh, Jaber ; Golshani, Negin ; Ishihara, Ryoichi ; Mofrad, Mohammad Reza Tajari ; Robertson, Michael ; Morrison, Thomas ; Beenakker, C.I.M.

Author_Institution

Lab. of Electron. Components, Technol. & Mater., Delft Univ. of Technol., Delft, Netherlands

Volume

58

Issue

11

fYear

2011

Firstpage

3954

Lastpage

3961

Abstract

In this paper, we report monolithic integration of two single-grain silicon layers for static random access memory (SRAM) and image sensor applications. A 12 × 28 silicon lateral photodiode array with a 25-μm pixel size prepared on top of a three-transistor readout circuit with individual outputs for every pixel is demonstrated. 6T SRAM cells with two layers of stacked transistors were prepared to compare the performance and area of each cell in different configurations.

Keywords

SRAM chips; detector circuits; elemental semiconductors; image sensors; integrated optoelectronics; photodiodes; readout electronics; silicon; three-dimensional integrated circuits; SRAM; Si; image sensor; lateral photodiode array; monolithic 3D integration; readout circuit; single grain silicon layer; static random access memory; Image sensors; Logic gates; MOSFETs; Photodiodes; Random access memory; Silicon; 3-D integrated circuits (3-DICs); 6T SRAM cells; Excimer laser crystallization; image sensors; monolithic integration;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2011.2163720

Filename

6017197